The present invention relates generally to the field of semiconductors and semiconductor manufacturing. More particularly, the present invention relates to semiconductor devices using conductive spacers for use in an SRAM cell layout, and methods of forming such spacers.
The dimensions of semiconductor devices are shrinking rapidly, while circuit complexity and density continue to increase. Any innovation with the potential to reduce the size of semiconductor devices is desirable. In particular, methods of reducing Static Random Access Memory (SRAM) cell size are in great demand. However, the increase in complexity and decrease in size has made such reductions increasingly difficult to achieve.
A limiting factor for the shrinking of SRAM cells has been the need for interconnects formed on one or more metallization layers above the semiconductor device. Typically, a layer of highly conductive metal is deposited on top of the semiconductor device and patterned to form the desired interconnects between contacts on the device.
Accordingly, it has been proposed to decrease the size of semiconductor devices, in particular SRAM cells, by using local interconnects, that is, connections that lie within the cell. Most of the prior art methods for creating local interconnects are costly and complicated.
Therefore, there is a need for methods and structures that overcome one or more of the deficiencies of prior art methods.